NLTL Comb Generator (#2, v1)
I got the workbench pretty much all set up this past weekend. Work’s been slow
so I’ve been able to unpack a lot of components and have been making good
headway on building up the N2PK VNA. I need to make a Mini-Circuits order to
finish that and some other things, so I decided to switch gears for a minute.
The first step in my DDS LO design is to create a 3.5GHz clock. Following the
rabbit hole from Martein Bakker’s work on down to NIST’s timing group, I
found the non-linear transmission line comb generator (multiplier, pulse generator)
to compare favorably with other methods of frequency multiplication, especially
with regards to phase noise. Thus, I set out to build one. This will all be
detailed on the DDS LO page when I finish setting that up.
I laid out an 8-stage NLTL in Eagle with 0603 inductor pads and 0402 varactor
diodes. I debated getting some boards professionally fabricated, but inspired
by the fine folks who regularly do fine pitch SMT boards at home, I chose
to test the limits of my laser printer -> laminator -> etchant setup.
Laminator Toner Transfer
I’m hooked on the laminator for toner transfer. It works. You can see the
printout on the right. Pretty sure this attempt failed though…
This was the first try last night, I got a bad feeling as soon as I saw that bubble.
Most paper removed…
I was afraid of this, or something like it. When laminating I think I had left
too much paper attached and a few times I heard a pop like a part coming unstuck.
I think it was a wrinkle relieving itself. I debated trying to sharpie this board
but in the end too much was wrong.
Third time’s the charm? I realized too much paper was an issue, and also
that trimming the board after etching was a) risky, and b) wasteful of copper
and etchant. So, this time I cut everything to size, attached to a leader,
and things looked good. Careful etching now because I’ve got seriously thin
traces and the gap on the CPW is only 7mil…
Scrubbed down with scotchbrite, careful not to scratch the traces. At this
point I was happy with the etch so I decided to build it up.
Build and Test
I was at a sort of crossroads after etching this board. The plan is to have
two multiplier stages, the first an x5 from the 100MHz OCXO output to 500MHz.
The output of the first multiplier then gets amplified and sent to another NLTL
to get an x7 output at 3.5GHz. Somewhere along the line I didn’t pay attention
and got two different sizes for the inductors for each stage, so technically
I should re-do the layout for the 0402 inductors I have for the first stage.
However, in the interest of testing my layout, concept, test equipment, etc.,
I went ahead and built up the NLTL for the 2nd stage, and tried it out with
the 100MHz signal.
No reflow capabilities at the moment which makes life interesting. The diodes
only have contact on the bottom, so I tinned each pad and then reflowed while
pushing with the tip of the iron. At least it looks cool.
The final version won’t be connectorized, but I really wanted to test and
this gives me flexibility. Had to shim the connectors because this is 0.032
thick board and they’re made for 0.068. You’ll also notice a 2kΩ resistor
between the signal and groundplane. This should allow the line to self-bias
due to rectified voltage.
Kind of a kludgy setup, surplus OCXO powered by an unregulated wall-wart
(massive transformer though…) through an LM7812. Should throw a heatsink
on the regulator, but this was a quick hack.
I had to double check everything, I couldn’t believe it worked!. 7L13 spec.
an. showing 0-1.8GHz. Nice 100MHz comb! Grabbed a better picture but the CRT
readout was being flaky, I’ll need to take a look at that.
Time Domain - OCXO
While I had it set up, I couldn’t pass up the opportunity to take a look in
the time domain. This is the output of the OCXO directly input to the 7A26
amplifier. I honestly don’t know if this is what it’s supposed to look like,
being surplus and not a listed part #, but the H in the number (VFT22H-100MHz)
is noted elsewhere as HCMOS output, which makes the sharp leading edge make
a little more sense. Not sure what kind of load it’s meant to drive, etc., but
so long as the phase noise is OK, should work for my application. 10V p-p is
pretty serious too…
Time Domain - OCXO + NLTL
Output is attenuated and sharpened. Not as much loss as I expected, although
the fundamental should be pretty strong. ~6V p-p after the NLTL. This is on the
7A29 so we can get a faster image, I need an attenuator before I’m comfortable
putting the straight OCXO output into that input.
Not sure if this really follows the 90-10 rule or whatever, but if we fudge
a little, sure looks like ‹1nS risetime. Nice.
Need to bump up my understanding of risetime measurements, but this is
what we get at 200pS/div. No flat-top here, but a nice pulse all the same.
Closing with a bad shot of the test setup on the bench. I need some shorter
I’m very happy with the initial test. I may try and do the first stage board
at the office with solder paste and the toaster oven since it’s all 0402.
Can’t wait to see what the pulse looks like after two NLTL stages! Would love
to max out this scope. Then I’ll have to figure out a faster method. Sampling?